可訂購部件
| 型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經銷商處購買 |
|---|---|---|---|---|
| 74AXP4T245BQ | 74AXP4T245BQX | 935690704115 | SOT763-1 | 訂單產品 |
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Click here for more information74AXP4T245BQ
4-bit dual supply translating transceiver; 3-state
The 74AXP4T245 is an 4-bit dual supply translating transceiver with 3-state outputs that enable bidirectional level translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features four 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), a output enable input (nOE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.9 V and 5.5 V making the device suitable for translating between any of the low voltage nodes (0.9 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). No power supply sequencing is required and output glitches during power supply transitions are prevented using patented circuitry. As a result glitches will not appear on the outputs for supply transitions during power-up/down between 20 mV/μs and 5.5 V/s.
Pins nAn, nOE and nDIR are referenced to VCC(A) and pins nBn are referenced to VCC(B). A HIGH on nDIR allows transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both nAn and nBn are in the high-impedance OFF-state.
Features and benefits
Wide supply voltage range for VCC(A) and VCC(B): 0.9 V to 5.5 V
Low input capacitance; CI = 1.2 pF (typical)
Low output capacitance; CO = 3.6 pF (typical)
Low dynamic power consumption; CPD = 10 pF (typical)
Low static power consumption; ICC = 2 μA (25 °C maximum)
High noise immunity
Complies with JEDEC standard:
JESD8-12 (1.1 V to 1.3 V; inputs)
JESD8-11 (1.4 V to 1.6 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD12-6 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2 kV
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1 kV
Latch-up performance exceeds 100 mA per JESD78D Class II
Inputs accept voltages up to 5.5 V
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Typical data rate figures:
320 Mbps when translating from 1.8 V to 3.3 V (up translation)
175 Mbps when translating from 3.3 V to 1.8 V (down translation)
Low noise overshoot and undershoot < 10% of VCCO
IOFF circuitry provides partial power-down mode operation
Specified from -40 °C to +125 °C
參數類型
| 型號 | VCC(A) (V) | VCC(B) (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name | Category |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AXP4T245BQ | 0.9?-?5.5 | 0.9?-?5.5 | CMOS | ± 12 | 9 | 4 | ultra low | -40~125 | 90 | 11.9 | 60 | DHVQFN16 | Bi-directional | Direction controlled |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AXP4T245BQ | 74AXP4T245BQX (935690704115) |
Active | P4T245 |
DHVQFN16 (SOT763-1) |
SOT763-1 | SOT763-1_115 |
Series
文檔 (10)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74AXP4T245 | 4-bit dual supply translating transceiver; 3-state | Data sheet | 2020-02-06 |
| AN90029 | Pin FMEA for AXPnT family | Application note | 2021-07-13 |
| AN90063 | Questions about package outline drawings | Application note | 2025-06-13 |
| SOT763-1 | 3D model for products with SOT763-1 package | Design support | 2019-10-03 |
| Nexperia_document_leaflet_Logic_AXP_technology_portfolio_201904 | AXP – Extremely low-power logic technology portfolio | Leaflet | 2019-04-05 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| DHVQFN16_SOT763-1_mk | plastic, dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 0.85 mm body | Marcom graphics | 2017-01-28 |
| SOT763-1 | plastic, leadless dual in-line compatible thermal enhanced very thin quad flat package; 16 terminals; 0.5 mm pitch; 3.5 mm x 2.5 mm x 1 mm body | Package information | 2023-05-11 |
| SOT763-1_115 | DHVQFN16; Reel pack, SMD, 7" Q1/T1 product orientation | Packing information | 2020-04-21 |
| 74AXP4T245BQ_Nexperia_Product_Reliability | 74AXP4T245BQ Nexperia Product Reliability | Quality document | 2025-03-20 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| SOT763-1 | 3D model for products with SOT763-1 package | Design support | 2019-10-03 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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訂購、定價與供貨
| 型號 | Orderable part number | Ordering code (12NC) | 狀態 | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74AXP4T245BQ | 74AXP4T245BQX | 935690704115 | Active | SOT763-1_115 | 3,000 |
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樣品
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.