可訂購部件
| 型號 | 可訂購的器件編號 | 訂購代碼(12NC) | 封裝 | 從經銷商處購買 |
|---|---|---|---|---|
| 74HC2G66DP-Q100 | 74HC2G66DP-Q100H | 935300856125 | SOT505-2 | 訂單產品 |
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Click here for more information74HC2G66DP-Q100
Dual single-pole single-throw analog switch
The 74HC2G66-Q100; 74HCT2G66-Q100 is a dual single pole, single-throw analog switch. Each switch has two input/output terminals (nY and nZ) and a digital enable input (nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications.
Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range from 2.0 V to 10.0 V for 74HC2G66-Q100
Very low ON resistance:
41 ? (typ.) at VCC = 4.5 V
30 ? (typ.) at VCC = 6.0 V
21 ? (typ.) at VCC = 9.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
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Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
參數類型
| 型號 | Configuration | VCC (V) | RON (Ω) | Logic switching levels | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|
| 74HC2G66DP-Q100 | SPST-NO | 2.0?-?9.0 | 105 | CMOS | very low | -40~125 | 200 | 16.3 | 101 | TSSOP8 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
|---|---|
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封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74HC2G66DP-Q100 | 74HC2G66DP-Q100H (935300856125) |
Active | H66 |
TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
文檔 (10)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74HC_HCT2G66_Q100 | Dual single-pole single-throw analog switch | Data sheet | 2023-11-21 |
| AN10161 | PicoGate Logic footprints | Application note | 2002-10-29 |
| AN11044 | Pin FMEA 74HC/74HCT family | Application note | 2019-01-09 |
| AN90063 | Questions about package outline drawings | Application note | 2025-06-13 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
| SOT505-2_125 | TSSOP8; Reel pack for SMD, 7''; Q3/T4 product orientation | Packing information | 2020-04-21 |
| 74HC2G66DP-Q100_Nexperia_Product_Reliability | 74HC2G66DP-Q100 Nexperia Product Reliability | Quality document | 2025-03-20 |
Longevity
The Nexperia Longevity Program is aimed to provide our customers information from time to time about the expected time that our products can be ordered. The NLP is reviewed and updated regularly by our Executive Management Team. View our longevity program here.
模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
PCB Symbol, Footprint and 3D Model
| Model Name | 描述 |
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訂購、定價與供貨
| 型號 | Orderable part number | Ordering code (12NC) | 狀態 | 包裝 | Packing Quantity | 在線購買 |
|---|---|---|---|---|---|---|
| 74HC2G66DP-Q100 | 74HC2G66DP-Q100H | 935300856125 | Active | SOT505-2_125 | 3,000 |
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樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機構訂購樣品。
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How does it work?
The interactive datasheets are based on the Nexperia MOSFET precision electrothermal models. With our interactive datasheets you can simply specify your own conditions interactively. Start by changing the values of the conditions. You can do this by using the sliders in the condition fields. By dragging the sliders you will see how the MOSFET will perform at the new conditions set.