74AUP2G58
Low-power dual PCB configurable multiple function gate
The 74AUP2G58 is a dual configurable multiple function gate with Schmitt-trigger inputs. Each gate within the device can be configured as any of the following logic functions AND, OR, NAND, NOR, XOR, inverter and buffer; using the 3-bit input. All inputs can be connected directly to VCC or GND.
This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Low static power consumption; ICC = 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 3A exceeds 5000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74AUP2G58DP | 0.8?-?3.6 | CMOS | ± 1.9 | 8.7 | 70 | 2 | ultra low | -40~125 | 120 | 30 | TSSOP10 |
| 74AUP2G58GU | 0.8?-?3.6 | CMOS | ± 1.9 | 8.7 | 70 | 2 | ultra low | -40~125 | 142 | 48 | XQFN10 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ (935304476118) |
Active | aK |
TSSOP10 (SOT552-1) |
SOT552-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT552-1_118 |
| 74AUP2G58GU | 74AUP2G58GUX (935304479115) |
Active | aK |
XQFN10 (SOT1160-1) |
SOT1160-1 | SOT1160-1_115 |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態(tài) | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74AUP2G58GF | 74AUP2G58GFX (935304477115) |
Obsolete | aK |
XSON10 (SOT1081-2) |
SOT1081-2 | 暫無信息 |
環(huán)境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AUP2G58DP | 74AUP2G58DPJ | 74AUP2G58DP |
|
|
| 74AUP2G58GU | 74AUP2G58GUX | 74AUP2G58GU |
|
|
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74AUP2G58GF | 74AUP2G58GFX | 74AUP2G58GF |
|
|
文檔 (14)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74AUP2G58 | Low-power dual PCB configurable multiple function gate | Data sheet | 2023-07-31 |
| AN90063 | Questions about package outline drawings | Application note | 2025-06-13 |
| Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
| Nexperia_document_guide_MiniLogic_MicroPak_201808 | MicroPak leadless logic portfolio guide | Brochure | 2018-09-03 |
| SOT552-1 | 3D model for products with SOT552-1 package | Design support | 2020-01-22 |
| SOT1160-1 | 3D model for products with SOT1160-1 package | Design support | 2019-10-03 |
| Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Nexperia_document_leaflet_Logic_AUP_technology_portfolio_201904 | Leaflet | 2019-04-12 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP10_SOT552_mk | plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm body | Marcom graphics | 2017-01-28 |
| XQFN10_SOT1160-1_mk | plastic, extremely thin quad flat package; no leads; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm body | Marcom graphics | 2017-01-28 |
| SOT552-1 | plastic, thin shrink small outline package; 10 leads; 0.5 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2025-03-19 |
| SOT1081-2 | plastic, leadless extremely thin small outline package; 10 terminals; 0.35 mm pitch; 1.7 mm x 1 mm x 0.5 mm body | Package information | 2020-04-21 |
| SOT1160-1 | plastic, leadless extremely thin quad flat package; 10 terminals; 0.4 mm pitch; 1.4 mm x 1.8 mm x 0.5 mm body | Package information | 2022-06-07 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
如果您需要設(shè)計/技術(shù)支持，請告知我們并填寫 應答表 我們會盡快回復您。
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機構(gòu)訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區(qū)分銷商網(wǎng)絡可為您提供 Nexperia 樣品支持。查看官方經(jīng)銷商列表。