
74LVC3G16
Triple buffer
The 74LVC3G16 provides three buffers.
The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of the 74LVC3G16 as a translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.
Features and benefits
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數(shù)類型
型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | fmax (MHz) | Nr of bits | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
---|---|---|---|---|---|---|---|---|---|---|---|
74LVC3G16DP | 1.65?-?5.5 | CMOS/LVTTL | ± 32 | 175 | 3 | low | -40~125 | 217 | 18.5 | 106 | TSSOP8 |
封裝
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74LVC3G16DP | 74LVC3G16DPH (935307606125) |
Active | YU |
![]() TSSOP8 (SOT505-2) |
SOT505-2 | SOT505-2_125 |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態(tài) | 標(biāo)示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74LVC3G16GF | 74LVC3G16GFX (935307607115) |
Obsolete | no package information | ||||
74LVC3G16GM | 74LVC3G16GMH (935307608125) |
Obsolete | no package information |
環(huán)境信息
型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74LVC3G16DP | 74LVC3G16DPH | 74LVC3G16DP |
|
![]() |
下表中的所有產(chǎn)品型號均已停產(chǎn) 。
型號 | 可訂購的器件編號 | 化學(xué)成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74LVC3G16GF | 74LVC3G16GFX | 74LVC3G16GF |
|
![]() |
74LVC3G16GM | 74LVC3G16GMH | 74LVC3G16GM |
|
![]() |
文檔 (7)
文件名稱 | 標(biāo)題 | 類型 | 日期 |
---|---|---|---|
74LVC3G16 | Triple buffer | Data sheet | 2024-05-02 |
AN90063 | Questions about package outline drawings | Application note | 2025-06-13 |
Nexperia_document_guide_MiniLogic_PicoGate_201901 | PicoGate leaded logic portfolio guide | Brochure | 2019-01-07 |
SOT505-2 | 3D model for products with SOT505-2 package | Design support | 2019-01-18 |
lvc3g16 | 74LVC3G16 IBIS model | IBIS model | 2015-11-09 |
Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
SOT505-2 | plastic, thin shrink small outline package; 8 leads; 0.65 mm pitch; 3 mm x 3 mm x 1.1 mm body | Package information | 2022-06-03 |
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