74LVC16374A; 74LVCH16374A
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
The 74LVC16374A; 74LVCH16374A is a 16?-?bit edge?-?triggered D?-?type flip?-?flop with 3?-?state outputs. The device can be used as two 8?-?bit flip?-?flops or one 16?-?bit flip?-?flop. The device features two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8?-?bits. The flip?-?flops will store the state of their individual D?-?inputs that meet the set?-?up and hold time requirements on the LOW?-?to?-?HIGH clock (nCP) transition. A HIGH on nOE causes the outputs to assume a high?-?impedance OFF?-?state. Operation of the nOE input does not affect the state of the flip?-?flops. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments.
Schmitt?-?trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
Features and benefits
Overvoltage tolerant inputs to 5.5 V
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
Multibyte flow-through standard pinout architecture
Low inductance multiple supply pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold (74LVCH16374A only)
High-impedance outputs when VCC = 0 V
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
參數類型
| 型號 | VCC (V) | Logic switching levels | Output drive capability (mA) | tpd (ns) | fmax (MHz) | Power dissipation considerations | Tamb (°C) | Rth(j-a) (K/W) | Ψth(j-top) (K/W) | Rth(j-c) (K/W) | Package name |
|---|---|---|---|---|---|---|---|---|---|---|---|
| 74LVC16374ADGG | 1.2?-?3.6 | CMOS/LVTTL | ± 24 | 3.8 | 150 | low | -40~125 | 82 | 2 | 37 | TSSOP48 |
| 74LVCH16374ADGG | 1.2?-?3.6 | CMOS/LVTTL | ± 24 | 3.8 | 150 | low | -40~125 | 82 | 2 | 37 | TSSOP48 |
封裝
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC16374ADGG | 74LVC16374ADGG,118 (935235190118) |
Active | LVC16374A |
TSSOP48 (SOT362-1) |
SOT362-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT362-1_118 |
| 74LVCH16374ADGG | 74LVCH16374ADGG,11 (935238510118) |
Active | LVCH16374A |
TSSOP48 (SOT362-1) |
SOT362-1 |
SSOP-TSSOP-VSO-WAVE
|
SOT362-1_118 |
下表中的所有產品型號均已停產 。
| 型號 | 可訂購的器件編號，（訂購碼(12NC)） | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
|---|---|---|---|---|---|---|---|
| 74LVC16374ABX | 74LVC16374ABX,518 (935295872518) |
Obsolete | LVC16374A Standard Procedure Standard Procedure | no package information | |||
| 74LVC16374ADL | 74LVC16374ADL,112 (935235180112) |
Obsolete | LVC16374A |
SSOP48 (SOT370-1) |
SOT370-1 |
SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE |
暫無信息 |
| 74LVC16374ADL,118 (935235180118) |
Obsolete | LVC16374A | SOT370-1_118 | ||||
| 74LVCH16374ABX | 74LVCH16374ABX,518 (935295875518) |
Obsolete | LVCH16374A Standard Procedure Standard Procedure | no package information | |||
| 74LVCH16374ADL | 74LVCH16374ADL,112 (935238500112) |
Obsolete | LVCH16374A Standard Procedure Standard Procedure |
SSOP48 (SOT370-1) |
SOT370-1 |
SSOP-TSSOP-VSO-REFLOW
SSOP-TSSOP-VSO-WAVE |
暫無信息 |
| 74LVCH16374ADL,118 (935238500118) |
Obsolete | LVCH16374A Standard Procedure Standard Procedure | SOT370-1_118 | ||||
環境信息
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC16374ADGG | 74LVC16374ADGG,118 | 74LVC16374ADGG |
|
|
| 74LVCH16374ADGG | 74LVCH16374ADGG,11 | 74LVCH16374ADGG |
|
|
下表中的所有產品型號均已停產 。
| 型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
|---|---|---|---|---|
| 74LVC16374ABX | 74LVC16374ABX,518 | 74LVC16374ABX |
|
|
| 74LVC16374ADL | 74LVC16374ADL,112 | 74LVC16374ADL |
|
|
| 74LVC16374ADL | 74LVC16374ADL,118 | 74LVC16374ADL |
|
|
| 74LVCH16374ABX | 74LVCH16374ABX,518 | 74LVCH16374ABX |
|
|
| 74LVCH16374ADL | 74LVCH16374ADL,112 | 74LVCH16374ADL |
|
|
| 74LVCH16374ADL | 74LVCH16374ADL,118 | 74LVCH16374ADL |
|
|
文檔 (13)
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| 74LVC_LVCH16374A | 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state | Data sheet | 2024-04-22 |
| AN11009 | Pin FMEA for LVC family | Application note | 2019-01-09 |
| AN263 | Power considerations when using CMOS and BiCMOS logic devices | Application note | 2023-02-07 |
| AN90063 | Questions about package outline drawings | Application note | 2025-06-13 |
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
| lvc16374a | lvc16374a IBIS model | IBIS model | 2013-04-08 |
| lvch16374a | lvch16374a IBIS model | IBIS model | 2013-04-09 |
| Nexperia_package_poster | Nexperia package poster | Leaflet | 2020-05-15 |
| TSSOP48_SOT362-1_mk | plastic, thin shrink small outline package; 48 leads; 0.5 mm pitch; 12.8 mm x 6.1 mm x 1.2 mm body | Marcom graphics | 2017-01-28 |
| SOT362-1 | plastic thin shrink small outline package; 48 leads; body width 6.1 mm | Package information | 2024-01-05 |
| SOT370-1 | plastic, shrink small outline package; 48 leads; 0.635 mm pitch; 15.9 mm x 7.5 mm x 2.8 mm body | Package information | 2020-04-21 |
| SSOP-TSSOP-VSO-REFLOW | Footprint for reflow soldering | Reflow soldering | 2009-10-08 |
| SSOP-TSSOP-VSO-WAVE | Footprint for wave soldering | Wave soldering | 2009-10-08 |
支持
如果您需要設計/技術支持，請告知我們并填寫 應答表 我們會盡快回復您。
模型
| 文件名稱 | 標題 | 類型 | 日期 |
|---|---|---|---|
| SOT362-1 | 3D model for products with SOT362-1 package | Design support | 2020-01-22 |
| lvc16374a | lvc16374a IBIS model | IBIS model | 2013-04-08 |
| lvch16374a | lvch16374a IBIS model | IBIS model | 2013-04-09 |
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶，您可以通過我們的銷售機構訂購樣品。
如果您沒有 Nexperia 的直接賬戶，我們的全球和地區分銷商網絡可為您提供 Nexperia 樣品支持。查看官方經銷商列表。