
74AVC16835A
18-bit registered driver with Dynamic Controlled Outputs; 3-state
The 74AVC16835A is an 18-bit universal bus driver. Data flow is controlled by output enable (OE), latch enable (LE) and clock inputs (CP).
This product is designed to have an extremely fast propagation delay and a minimum amount of power consumption.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient.
Features and benefits
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standards:
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-1A (2.7 V to 3.6 V)
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation
Low inductance multiple VCC and GND pins to minimize noise and ground bounce
Power off disables 74AVC16835A outputs, permitting Live Insertion
Integrated input diodes to minimize input overshoot and undershoot
Applications
封裝
下表中的所有產品型號均已停產 。
型號 | 可訂購的器件編號,(訂購碼(12NC)) | 狀態 | 標示 | 封裝 | 外形圖 | 回流焊/波峰焊 | 包裝 |
---|---|---|---|---|---|---|---|
74AVC16835ADGG | 74AVC16835ADGG,112 (935267932112) |
Obsolete | no package information | ||||
74AVC16835ADGG,118 (935267932118) |
Obsolete |
環境信息
下表中的所有產品型號均已停產 。
型號 | 可訂購的器件編號 | 化學成分 | RoHS | RHF指示符 |
---|---|---|---|---|
74AVC16835ADGG | 74AVC16835ADGG,112 | 74AVC16835ADGG |
|
![]() |
74AVC16835ADGG | 74AVC16835ADGG,118 | 74AVC16835ADGG |
|
![]() |
文檔 (1)
文件名稱 | 標題 | 類型 | 日期 |
---|---|---|---|
74AVC16835A | 18-bit registered driver with Dynamic Controlled Outputs; 3-state | Data sheet | 2018-09-24 |
支持
如果您需要設計/技術支持,請告知我們并填寫 應答表 我們會盡快回復您。
模型
No documents available
Ordering, pricing & availability
樣品
作為 Nexperia 的客戶,您可以通過我們的銷售機構訂購樣品。
如果您沒有 Nexperia 的直接賬戶,我們的全球和地區分銷商網絡可為您提供 Nexperia 樣品支持。查看官方經銷商列表。